Link-Capture™ Software for Napatech FPGA-based SmartNICs
Tech specs
FEATURES | Link-Capture™ Software for Napatech FPGA SmartNICs |
Rx Packet Processing | • Line rate Rx up to 100 Gbps for packet size 64 – 10,000 bytes • Zero packet loss • Multi-port packet merge, sequenced in time stamp order |
L2, L3 and L4 protocol classification | • L2: Ether II, IEEE 802.3 LLC, IEEE 802.3/802.2 SNAP • L2: PPPoE Discovery, PPPoE Session, Raw Novell • L2: ISL, 3x VLAN, 7x MPLS • L3: IPv4, IPv6 • L4: TCP, UDP, ICMP, SCTP • L2 and L3/L4 (IP/TCP/UDP) Tx checksum generation • L2 and L3/L4 (IP/TCP/UDP) Rx checksum verification |
Tunneling support | • GTP, IP-in-IP, GRE, NVGRE, VxLAN, Pseudowire, Fabric Path |
General purpose filters | • Pattern match, network port, protocol, length check, error conditions |
Flow filtering | • Configurable flow definitions based on 2-, 3-, 4-, 5- or 6-tuple • Up to 36,000 IPv4 or up to 7,500 IPv6 2-tuple flows • Flow match/actions: forward to specific host Rx queue, drop, fast forward to network port, select packet descriptor type, slice |
Stateful flow management (NT100A01 and NT200A02) | • Configurable flow definitions based on 2-, 3-, 4-, 5- or 6-tuple • Up to 140 million bidirectional IPv4 or IPv6 flows • Learning rate: 3 million flows/sec • Flow match/actions: forward to specific host Rx queue, drop, fast forward to network port, update metrics in flow record • Flow termination: TCP protocol, timeout, application- requested • Flow records: Rx packet/byte counters and TCP flags, delivered to application at flow termination |
Hash keys | • Custom 2 × 128 bits and 2 × 32 bits with separate bit masks • Symmetric hash keys • Protocol field from inner or outer headers |
Load distribution | • Hash key, filter-based or per flow • To local CPU cores via host buffers/queues • Remotely via VLAN tagging over egress port (NT200A02 and NT100A01) • CPU Socket Load Balancing (NT200A02, NT100A01) |
Packet descriptors and metadata | • PCAP and Napatech descriptor formats • Time stamp, network port ID, header offsets • Hash key, color/tag • 64-bit pointer for flow lookup • 64-bit correlation key with maskable fields (packet fingerprint) • Protocol and error information |
IP fragment handling | • First level IP fragmentation • Filter actions on inner header fields applied to all fragments |
Deduplication | • Configurable action per port group: discard or pass duplicates • Duplicate counters per port group |
Slicing | • Dynamic offset or fixed offset from start or end of packet |
Header stripping (NT200A02 and NT100A01) | • Removal of protocol layers between outer L2 and inner L3 headers |
Packet masking (NT200A02 and NT100A01) | • Zeroing of 1 – 64 bytes at dynamic or fixed offset |
Tx Packet Processing | • Line rate Tx up to 100 Gbps for packet size 64 – 10,000 bytes • Replay as captured with nanoseconds precision • Per-port traffic shaping • Port-to-any-port forwarding |
Rx buffer capacity | • NT200A02: 12GB • NT100A01: 8GB • NT50B01: 10GB • NT40A11: 4GB |
Host Buffers and Queues | • Rx queues: 128, Tx queues: 128 • Rx buffer size: 16 MB – 1 TB, Tx buffer size: 4 MB |
Advanced Statistics | • Extended RMON1 per port • Packets and bytes per filter/color and per stream/queue |
Time Stamping and Synchronization | • OS time • PPS and IEEE 1588-2008 PTP V2 (*) • NT-TS synchronization between Napatech SmartNICs (*) • Time stamp formats: Unix 10 ns, Unix 1 ns, PCAP 1 us, PCAP 1 ns • Tx time stamp inject • Rx time stamp with 1 ns resolution |
Monitoring sensors | • PCB temperature level with alarm • FPGA temperature level with alarm and automatic shutdown • Temperature of critical components • Individual optical port temperature or light level with alarm • Voltage or current overrange with alarm • Cooling fan speed with alarm |
Supported OS | • Linux kernel 3.0 – 3.19, 4.0 – 4.18, 5.0 – 5.11 (64-bit) • Windows Server 2016 and 2019 (64-bit) |
Supported APIs | • libpcap v. 1.7.3, 1.8.1, 1.9.0 and WinPcap v. 4.1.3 • DPDK v. 20.11 • NTAPI (Napatech API) |
Supported Hardware and Transceivers | NT200A02: • 1000BASE-T, SX, LX, ZX • 10GBASE-SR, CR, LR, ER and breakout to 4x10GBASE-SR, CR, LR • 25GBASE-SR, LR, LR-BiDi and breakout to 4x25GBASE-SR, LR • 40GBASE-SR4, SR-BiDi, CR4, LR4 • 100GBASE-SR4, SR-BiDi, LR4NT100A01: • 1000BASE-T, SX, LX, ZX • 10GBASE-SR, CR, LR, ER • 25GBASE-SR, LR, LR-BiDiNT50B01: • 10GBASE-SR, CR, LR, ER • 25GBASE-SR, LR, LR-BiDiNT40A11: • 1000BASE-T, SX, LX, ZX • 10GBASE-T, SR, CR, LR, ER |
(*) Not supported by the NT40A11 |
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